1. Field of the Invention
The present invention relates to semiconductor devices. In particular, the present invention relates to methods for driving programmable logic devices.
Unlike a normal integrated circuit in which all the circuits are fixed at the time of manufacture, a programmable logic device (PLD) can function with an intended circuit structure set by a user at the time of actual use after shipment. Examples of such user-programmable devices are small-scale logics such as a programmable array logic (PAL) and a generic array logic (GAL) and large-scale logics such as a complex programmable logic device (CPLD) and a field programmable gate array (FPGA). In this specification, such devices are called PLDs.
2. Description of the Related Art
PLDs show flexibility in a reduction in development period and a change in design specification compared to conventional application specific integrated circuits (ASICs) and gate arrays, which is advantageous. In recent years, PLDs have been rapidly spread in electronic devices and the like coupled with development of microfabrication technique.
A PLD includes, for example, a plurality of logic elements (hereinafter referred to as LEs) and wirings between the LEs. The function of the PLD can be changed by changing the functions of the LEs or a connection path between the LEs.
The function of the LE can be specified by, for example, setting data (configuration data) for determining the function of the LE in configuration memories included in a look-up table (hereinafter referred to as an LUT) and a multiplexer (hereinafter referred to as an MUX). In addition, the connection path between the LEs can be specified by setting configuration data for determining the state of a switch provided between wirings in a configuration memory storing the on or off state of the switch.
Dynamic reconfigurable PLDs attract attention. Among the dynamic reconfigurable PLDs, multi-context PLDs attract attention. A multi-context PLD achieves dynamic reconfiguration by temporarily storing configuration data in a configuration memory storing the state of an LE or a switch.
Patent Document 1 discloses a dynamic reconfigurable PLD in which pieces of configuration data corresponding to a plurality of circuit structures are stored in different addresses in a dynamic random access memory (DRAM) and a configuration memory is a static random access memory (SRAM).
A memory element including a DRAM or an SRAM has a problem of an increase in power consumption due to an increase in leakage current between power supply lines coupled with development of microfabrication technique.
The problem of an increase in power consumption is tried to be solved by technique for reducing power consumption, such as power gating technique in which power supply is stopped in a short period during which supply of power supply voltage is not needed. For example, Patent Document 2 discloses a configuration memory that includes a flip-flop and a nonvolatile memory and can retain configuration data even when supply of power supply voltage is stopped.